1. Field of the Invention
The present invention relates to wiring pattern structures of differential transmission paths, and more particularly, to a wiring pattern structure of high-speed differential transmission paths each including a plurality of pairs of signal lines, such as a digital visual interface (DVI), a high definition multimedia interface (HDMI), or the like.
2. Description of the Related Art
Integrated circuit elements used for high-speed differential transmission paths based on DVI, HDMI, or other standards are easily affected by excessive voltages, such as surge voltages, since lower voltages are supplied. Thus, electrostatic protection elements, such as varistors, need to be provided in differential transmission paths to protect integrated circuit elements from surge voltages or the like.
Electrostatic protection elements, such as varistors, have a capacitance. When an electrostatic protection element is provided in a differential transmission path, the characteristic impedance of a portion of the differential transmission path where the electrostatic protection element is provided is lower than the characteristic impedance of other portions of the differential transmission path where the electrostatic protection element is not provided.
Thus, when an electrostatic protection element is provided in a differential transmission path, a technology for achieving a substantially uniform characteristic impedance over the entire differential transmission path is required, as shown in FIG. 11. FIG. 11 is a schematic plan view showing an example of a wiring pattern structure of a differential transmission path for achieving a substantially uniform characteristic impedance. Referring to FIG. 11, a pair of signal lines 111 and 112 is provided on a front surface of a printed wiring board 100 and a ground is provided on a rear surface of the printed wiring board 100. The signal line 111 is provided for a differential signal D+ and the signal line 112 is provided for a differential signal D−. Electrostatic protection elements 200 are provided in the middle of the signal lines 111 and 112.
In the differential transmission path shown in FIG. 11, the distance between the signal lines 111 and 112 in an area A, that is, a portion where the electrostatic protection elements 200 are provided, is larger than the distance between the signal lines 111 and 112 in other portions, that is, portions of the transmission path other than the area A. The line-to-line coupling between the signal lines 111 and 112 in the area A is thus reduced. This increases the characteristic impedance in the area A, and the reduction in the characteristic impedance due to providing the electrostatic protection elements 200 is compensated for by the increase in the characteristic impedance in the area A. Thus, a substantially uniform characteristic impedance can be achieved over the entire pair of signal lines 111 and 112.
For the universal serial bus (USB) standard, only a single differential transmission path including the pair of signal lines 111 and 112 is used. Thus, the purpose can be sufficiently achieved by the technology shown in FIG. 11.
However, for the DVI or HDMI standard, a plurality of high-speed differential transmission paths is required. Thus, a problem explained with reference to FIG. 12 occurs when the technology shown in FIG. 11 is used.
FIG. 12 is a schematic plan view showing an example of a wiring pattern structure of a board having a plurality of differential transmission paths.
Referring to FIG. 12, differential transmission paths 110-1 to 110-4 are provided, and each of the differential-transmission paths 110-1 to 110-4 includes the pair of signal lines 111 and 112.
As shown in FIG. 12, for high-speed differential transmission paths based on the DVI or HDMI standard, four differential transmission paths, that is, the differential transmission paths 110-1 to 110-4, are provided between an integrated circuit element 300 and a connector 310. High-speed differential transmission paths of this type need to send and receive four types of differential signals by achieving synchronization between the integrated circuit element 300 and the connector 310, and the differential transmission paths 110-1 to 110-4 must be arranged to have the same wiring length. However, as shown in FIG. 12, when a plurality of differential transmission paths having the structure shown in FIG. 11 is provided between the integrated circuit element 300 and the connector 310, the lengths of the differential transmission paths 110-1 and 110-4 which are outer differential transmission paths, need to be longer than the lengths of the differential transmission paths 110-2 and 110-3 which are inner differential transmission paths. Thus, it is difficult to set the differential transmission paths to have the same wiring length.
In addition, the signal lines 111 and 112 in portions where the electrostatic protection elements 200 are provided must be separated from each other with a certain distance therebetween so as to accommodate the electrostatic protection elements 200 arranged laterally. Thus, in order to arrange a plurality of differential transmission paths each including the signal lines 111 and 112, a considerably large patterning area is required on the printed wiring board 100.